Effective softwarebased selftest strategies for online periodic testing of embedded processors. Embedded processorbased selftest dimitris gizopoulos springer. Among those, softwarebased selftesting sbst methods 1 are based on the application of functional stimuli to an onchip microprocessor, by making it run a specific piece of code. This is not an example of the work produced by our dissertation writing service. Online selftesting is the most costeffective technique which is used to ensure correct operation for microprocessorbased systems in the field and also improves their dependability in the presence of failures caused by components aging. Sbst fits particularly well for online testing of processorbased systems.
Antonis paschalis is full professor in logic design and architecture at the dept. In addition, its bandwidth must be as large as possible. Berger code based concurrent online selftesting of embedded. Fpga technology has enabled some vendors to develop diversity strategies based on internal architecture features to address digital common cause failure ccf with simpler solutions than those used for microprocessorbased technologies. This paper presents a self testing framework targeting the leon3 embedded microprocessor with builtin testscheduling features. Since the need for self testing is most acute for highperformance processors, we propose a new software based self testing methodology for processors, which uses a software tester embedded in the processor memory as a vehicle for applying structural tests. Feb 26, 2012 softwarebased selftesting strategies have been mainly proposed to tackle microprocessor testing, but may also be applied to peripheral testing. Pdf microprocessor softwarebased selftesting ernesto.
Lowcost softwarebased selftesting of risc processor cores. Softwarebased testing for system peripherals, journal of. The softwarebased selftesting sbst 1015 provides an alternative solution for the above mentioned limitations of hardware based selftesting methodology. Abstract online self testing is the solution for observing lasting and intermittent mistakes for non safety critical and realtime embedded multiprocessors. The system presents a target gain that has to be maintained without direct human intervention despite the presence of faults. Softwarebased selftesting strategies have been mainly proposed to tackle microprocessor testing, but may also be applied to peripheral testing. Weve taken precautionary measures to enable all staff to work away from the office. Systems with a microprocessor can use it to implement testing strategies for the whole system. A hybrid softwarebased selftesting methodology for.
In this paper, we investigate capabilities of the microprocessor testing by software procedures taking into account system environment constraints. We can divide functionalbased strategies into two subclasses. Looking into the future protection, automation and control. Softwarebased selftesting on microprocessors springerlink. George xenoulis, dimitris gizopoulos, mihalis psarakis, antonis m. Gizopoulos, a softwarebased selftest methodology for insystem testing of processor cache tag arrays, ieee international online testing symposium iolts 2010, corfu, greece, july 2010. Whether youve loved the book or not, if you give your honest and detailed thoughts then people will find new books that are right for them.
Hence, there is an emerging need for lowcost highquality selftest methodologies that can be used by processors to test themselves atspeed. Among sbst techniques, evolutionary feedbackbased ones prove effective in microprocessor testing. Those can be eliminated using software based self testing. Online self testing is the most costeffective technique which is used to ensure correct operation for microprocessor based systems in the field and also improves their dependability in the presence of failures caused by components aging. Figure 1 typical flow for a softwarebased selftesting sbst application. Temperatureaware softwarebased selftesting for delay. Among all the different cache blocks in a microprocessor, testing instruction caches represents. Among sbst techniques, evolutionary feedback based ones prove effective in microprocessor testing. Effective softwarebased selftest strategies for online. Poweraware optimization of softwarebased selftest for l1 caches in microprocessors 2014 proceedings of the 2014 ieee 20th international online testing symposium, iolts 2014, art. In this methodology, generation and application of test patterns for the processor under test and response analysis are carried out by specially written software routines executed on. Hence, there is an emerging need for lowcost highquality selftest. The proposed design exploits existing postproduction test sets, designed for softwarebased testing of embedded microprocessors.
The framework also includes a constraint based approach of testroutine scheduling. Publications digital systems and computer architecture. Gizopoulos, effective softwarebased selftest strategies for online periodic testing of embedded processors, ieee transactions on computeraided design of integrated circuits and systems, vol. Pdf microprocessor softwarebased selftesting researchgate. Softwarebased selftesting is a nonintrusive testing approach that embeds a software tester in the form of a selftest program in the processor onchip memory. A survey on different architectures uses in online self. In this paper, a temperatureaware software based self testing sbst technique is proposed to self heat the processors within a high temperature range and effectively test delay faults under high temperature. In this study, the authors propose an infrastructure. Hardware builtinselftest bist and designfortestability dft. Structural testing softwarebased selftesting sbst paradigm basic idea levels of application targeting different building blocks sbst stateoftheart an sbst research evolution from integer arithmetic units to highperformance microprocessors and. Hardware based self testing techniques have limitations in the performance and area overhead. Saluja, fellow, ieee, and hideo fujiwara, fellow, ieee abstractaggressive processor design methodology using highspeed clock and deep submicrometer. The tpg methods targeted to softwarebased and selftesting over instruction set architecture isa have been developed and published. This paper presents an adaptive amplifier that is part of a sensor node in a wireless sensor network.
An efficient functional test generation method for processors. Software based self test methodologies for embedded processor cores have the advantage that they utilize the processor functionality and instruction set for both test pattern generation and output data evaluation and thus do not add hardware or performance overheads in the optimized design. Opportunity vetting and roibased proof of concept are executed in a vendoragnostic environment, while iot mod ernization and cloud migrations can be completed more smoothly with the emerson consulting teams assistance. We assume that before test appli cation, the processor memory has been tested with standard techniques such as memory bist and is free of faults. Embedded hardware and software selftesting methodologies for. Automatic softwarebased self test generation for embedded.
First silicon debug and diagnosis are important issues to be tackled in order to minimise the timetomarket and avoid expensive respins, while volume testing is necessary for guaranteeing acceptable quality levels. This paper presents a selftesting framework targeting the leon3 embedded microprocessor with builtin testscheduling features. Softwarebased selftest methodologies for embedded processor cores have the advantage that they utilize the processor functionality and instruction set for both test pattern generation and output data evaluation and thus do not add hardware or performance overheads in the optimized design. A constraintbased solution for online testing of processors embedded in realtime applications. There are several advantages of the embedded software based self test approach. Effective rtlevel softwarebased selftesting of embedded processor cores, in.
An efficient functional test generation method for. Accelerating diagnostic fault simulation using zdiagnosis and concurrent equivalence identification. Depending upon the logical complexity microprocessors are supplied. First, it allows reuse of programmable resources on socs for test purposes.
Softwarebased selftest for small caches in microprocessors. Effective softwarebased selftest strategies for online periodic testing of embedded processors a paschalis, d gizopoulos ieee transactions on computeraided design of integrated circuits and, 2004. We also suggest the method which allows for distinguishing among different types of. This paper presents a procedure to transform traditional march tests into softwarebased selftest programs for setassociative cache memories with lru replacement. In the paper, we consider the case when both permanently and intermittently faulty units can occur in the system.
The software tester consists of programs for test generation and test application. Functional verification of dma controllers, journal of. This paper fundamentally describes the three programming and allotment policies for online self testing. Abstract online selftesting is the solution for observing lasting and intermittent mistakes for non safety critical and realtime embedded multiprocessors. Processor testing is not a new challenge, not a new adventure. An adaptive amplifier system for wireless sensor network. Those can be eliminated using softwarebased selftestin. Softwarebased selftest represents a very attractive test solution to cope with the problem of online and offline testing of microprocessorbased systems.
A lowcost software based self testing methodology for processor cores is presented with the aim of producing compact test code sequences developed with a limited engineering effort and achieving. Nowadays, most architectures are tackled with a combination of scan chains and softwarebased selftest sbst methodologies. The system is composed of a softwarebased builtin selftest scheme implemented in the node that checks all. More in particular, for microprocessor testing, functional test is usually applied by exploiting the software based self test sbst technique. Diagnosis of intermittently faulty units at system level. Poweraware optimization of software based self test for l1 caches in microprocessors 2014 proceedings of the 2014 ieee 20th international online testing symposium, iolts 2014, art. Microprocessor microprocessor integer datapath and control integer arithmetic units alu. Softwarebased selftesting of microprocessors request pdf. Digital systems and computer architecture laboratory. Diagnosis of intermittently faulty units at system level mdpi. Those can be eliminated using softwarebased selftesting. Microprocessor softwarebased selftesting ieee design.
Microprocessor test and validation microprocessor software based selftesting. Softwarebased selftesting methodology for processor cores ieee. The initial results show that the test execution time. Citeseerx document details isaac councill, lee giles, pradeep teregowda. Electronics and telecommunications quarterly home icm.
Softwarebased selftesting methodology for processor. We believe this is the first work towards the modeling of pipeline behavior for testing of a microprocessor in the functional mode. This paper fundamentally describes the three programming and allotment policies for online selftesting. Antonis paschalis professor in logic design and architecture prof. On the other hand, functional test guarantees that the circuit is tested under normal conditions, thus avoiding any over as well as undertesting issues. Softwarebased selftesting methodology for processor cores. Instructionbased online periodic selftesting of microprocessors with floatingpoint units. The paper deals with the problem of developing builtinselftest bist in microprocessors. Currently, builtin selftest bist is the primary selftest. Testing of microprocessors and embedded processors has always been a challenge because most traditional testing techniques fail when applied to them.
Microprocessor based substation protection and control system, developments in power system monitoring and control, iee, iee conference publ. Softwarebased selftest selftesting for processors or any processorbased soc can be. Softwarebased selftesting of microprocessors sciencedirect. These can be softwarebased algorithms that provide the alarms and diagnostic messages, or take defined actions for detected faults that would be very difficult or impossible in purely hardwarebased environments. In addition, the article proposes a taxonomy for different sbst methodologies according to their test program development philosophy, and. A softwarebased selftest methodology for system peripherals. A lowcost softwarebased selftesting methodology for processor cores is presented with the aim of producing compact test code sequences developed with a limited engineering effort and achieving. This paper presents a procedure to transform traditional march tests into software based self test programs for setassociative cache memories with lru replacement.
Softwarebased selftesting as a mechanism for improved. Pdf microprocessor softwarebased selftesting ernesto gomez. Udren, design criteria for an integrated microprocessorbased substation protection and control system, ieee. In other words, this strategy views testing as an application of the programmable components in the.
Hardwarebased selftesting techniques have limitations in the performance and area overhead. Dec 14, 2011 embedded processorbased selftest is a guide to selftesting strategies for embedded processors. Effective software selftest methodology for processor cores. Atspeed testing of gigahertz processors using external testers may not be technically and economically feasible. Embedded microprocessor cache memories suffer from limited observability and controllability creating problems during insystem tests. Embedded processors are regularly used today in most systemonchips socs. Instruction based online periodic self testing of microprocessors with floatingpoint units. Softwarebased selftest generation for microprocessors with high. Microprocessor softwarebased selftesting mihalis psarakis and dimitris gizopoulos university of piraeus ernesto sanchez and matteo sonza reorda politecnico di torino. In addition, the article proposes a taxonomy for different sbst methodologies according to their test program development philosophy, and summarizes research approaches based on sbst techniques for optimizing other key aspects. Mostly, diagnosis at a system level intends to identify only permanently faulty units. In this paper, a temperatureaware softwarebased selftesting sbst technique is proposed to selfheat the processors within a high temperature range and effectively test delay faults under high temperature. A survey on different architectures used in online self testing for real time systems i. Microprocessor softwarebased selftesting ieee computer society.
These changes have already rolled out with no interruptions, and will allow us to continue offering the same great service at your busiest time in the year. Solid datamanagement and integration strategies enable better data strategies and stronger itot collaboration. Despite that, today dft techniques like scanchains are an inevitable part of a processor testing plan that require an expensive external ate. Embedded processors are regularly used today in most. We then propose a new software based self testing methodology for processors, which uses a software tester embedded in the processor memory as a vehicle for applying structural tests. Softwarebased selftesting methodology for processor cores li chen, student member, ieee, and sujit dey, member, ieee abstract atspeed testing of gigahertz processors using external testers may not be technically and economically feasible. Selftesting means that the tests can be performed on a. It has the potential to provide high quality atspeed testing using lowcost external ate without any hardware or performance overheads. Embedded processorbased selftest is a guide to selftesting strategies for embedded processors. Microprocessor softwarebased selftesting ieee journals.
Such strategies are well suited to embedded systems that do not require immediate detection of errors and cannot afford the wellknown hardware, information, software, or time. We outline classical approaches based on hardware implementations, show their drawbacks and present software implementations, which can increase test effectiveness. Validation of an adaptive microprocessor eric fetzer intel usa 11. Nowadays, most architectures are tackled with a combination of scan chains and software based self test sbst methodologies.
The proposed design exploits existing postproduction test sets, designed for software based testing of embedded microprocessors. Softwarebased selftest sbst strategies are particularly useful for periodic testing of deeply embedded processors in lowcost embedded systems with respect to permanent and intermittent operational faults. Effective softwarebased selftesting for cmos vlsi processors. Sbst applies a set of functional test programs that are executed by the processor to achieve a given fault coverage. Dynamic scheduling of test routines for efficient online. This article discusses the potential role of softwarebased selftesting in the microprocessor test and validation process, as well as its supplementary role in other classic functional and structuraltest methods. The plasma cpu is a small synthesizable 32bit risc microprocessor. Semiconductor manufacturers aim at delivering highquality new devices within shorter times in order to gain market shares. Exploiting an infrastructureintellectual property for. More in particular, for microprocessor testing, functional test is usually applied by exploiting the softwarebasedselftest sbst technique. Contribution to the methods and algorithms of automatic. The framework also includes a constraintbased approach of testroutine scheduling. Softwarebased selftest of setassociative cache memories. The system is composed of a software based builtin self test scheme implemented in the node that checks all.
Overview of the approach the objective of this work is to develop a procedure for delay fault testing of a pipeline processorprocessor core that can be used to. Berger code based concurrent online selftesting of. A hybrid softwarebased selftesting methodology for embedded. Processor testing approaches based on the execution of selftest programs have been. Dynamic scheduling of test routines for efficient online self. Other readers will always be interested in your opinion of the books youve read.
In addition, the article proposes a taxonomy for different sbst methodologies according to their test program development philosophy, and summarizes research. Softwarebased testing for system peripherals springerlink. During last decade the tpg methods marked as softwarebased selftesting sbst methods have been developed for processor models 5. Identification of intermittently faulty units has some specifics which we have considered in this paper. There are several advantages of the embedded softwarebased selftest approach.
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